Justification of the Harmonics Active Filter Circuit Based on a Hybrid Cascade Inverter
DOI:
https://doi.org/10.14529/power210211Keywords:
multi-level inverter, inverter voltage optimization algorithm, common-mode voltage, multi-level hybrid inverter, pulse-width modulationAbstract
With an increase in the number of levels in the inverter, the circuit becomes more complicated, the number of semiconductor switches increases. Therefore, topologies, which make it possible to obtain an increase in voltage levels with a decrease in the number of semiconductors, to increase the performance and reliability of the system, are of great interest. The paper proposes a scheme of a hybrid cascade inverter, considers a method of pulse-width modulation based on a carrier, and presents a block diagram of an algorithm for generating reference modulating signals in an optimized method of pulse-width modulation. To control a hybrid inverter as part of an active harmonic filter, a method of pulse-width modulation of the carrier is proposed. It allows reducing the common-mode voltage, switching losses, and minimizing current and voltage harmonics. The paper describes the PWM algorithm, on the basis of which the control signals are modulated and then compared with a triangular carrier to generate a sequence of pulses that turn on or turn off semiconductor switches. The purpose of the proposed solutions is to improve harmonic distortion caused by non-linear load in a 0.4 kV low-voltage system. The results of modeling the proposed active harmonic filter circuit are presented. Based on the studies performed, it is shown that the use of an active harmonic filter based on a 5-stage hybrid inverter with pulse-width modulation control is an effective means of filtering higher harmonics on 0.4 kV low voltage buses in the presence of a nonlinear load, which allows solving the problem of eliminating the impact of higher harmonics on the production activities of the enterprise.
References
Alishah R.S., Nazarpour D., Hosseini S.H., Sabahi M. Reduction of power electronic elements in mul-tilevel converters using a new cascade structure. IEEE Trans. Ind. Electron., 2015, vol. 62, no. 1, pp. 256–259. DOI: 10.1109/tie.2014.2331012
Jos Rodrguez, Jih-Sheng Lai. Multilevel Inverters: An Overview of Topologies, Controls, and Applica-tions. IEEE Transactions in Industrial Electronics, 2002, vol. 49 (4), pp. 2703–2712. DOI: 10.1109/tie.2002.801052
Sourabh Rathod, Mukesh Kirar, Bharadwaj S.K. A review of Cascaded Multilevel inverter control techniques and its application. International research journal of Engg and Technology, 2015.
Nguyen Van Nho, Nguyen Xuan Bac. Carrier pwm control of cascaded hybrid npc 3-level inverter and two-level inverters. IEEE Transactions on Industrial Electronics, September 2011.
Sadigh A.K., Abarzadeh M., Corzine K.A., Dargahi V. A new breed of optimized symmetrical and asymmetrical cascaded multilevel power converters. IEEE J. Emerg. Sel. Topics Power Electron., 2015, vol. 3,
no. 4, pp. 1160–1170. DOI: 10.1109/jestpe.2015.2459011
Babaei E., Laali S. Optimum structures of proposed new cascaded multilevel inverter with reduced number of components. IEEE Trans. Ind. Electron., 2015, vol. 62, no. 11, pp. 6887–6895. DOI: 10.1109/tie.2015.2437330
Nadeem Ahmad, Binsy joseph. A Review Paper on Multilevel Inverters with Its Control and Power Quality Parameters. International journal of interdisciplinary, Research 2017.
Sourabh Rathod, Mukesh Kirar, Bharadwaj S.K. A review of Cascaded Multilevel inverter control techniques and its application. International research journal of Engineering and Technology, July 2015.
Chan R, Baek J, Kwak S. Simple algorithm with fast dynamics for cascaded H-bridge multilevel in-verter based on model predictive control method. Applied Power Electronics Conference and Exposition (APEC), 2017 IEEE, 2017, pp. 696–702. DOI: 10.1109/apec.2017.7930770
Tu Nguyen T.-K., Nguyen N.-V. Novel eliminated common mode voltage PWM sequences and an online algorithm to reduce current ripple for a three-level inverter. IEEE Trans. Power Electron., 2017, vol. 32, no. 10, pp. 7482–7493. DOI: 10.1109/tpel.2016.2634009
Uddin M., Mirzaeva G., Goodwin G., Stepien P. A simplified model predictive control to eliminate common mode voltage of an AC motor fed by a neutral point clamped inverter. International Conference on Electrical Machines and Systems, 2017, pp. 1–6. DOI: 10.1109/icems.2017.8056507
Liu P., Duan S., Yao C., Chen C. A double modulation wave CBPWM strategy providing neutral-point voltage oscillation elimination and CMV reduction for three-level NPC inverters. IEEE Trans. Ind. Elec-tron., 2018, vol. 65, no. 1, pp. 16–26. DOI: 10.1109/tie.2017.2723866
Tsai M.-J., Chen H.-C., Tsai M.-R., Wang Y.-B., Cheng P.-T. Evaluation of carrier-based modulation techniques with common-mode voltage reduction for neutral point clamped converter. IEEE Trans. Power Electron., 2018, vol. 33, no. 4, pp. 3268–3275. DOI: 10.1109/tpel.2017.2707583
Lewandovski M., Szelag A. Minimizing harmonics of the output voltage of the chopper inverter. Ar-chiv fur Elecktrotechnik, 1986, vol. 69, no. 4, pp. 223–226. DOI: 10.1007/bf01573601
Hava A.M., Un E. Performance analysis of reduced common mode voltage PWM methods and com-parison with standard PWM methods for three-phase voltage source inverters. IEEE Trans. Power Electron., 2009, vol. 24, no. 1, pp. 241–252. DOI: 10.1109/tpel.2008.2005719
Chandini G.S., Shiny G. Common mode voltage elimination technique for an open-end winding in-duction motor using carrier-based PWM. International Conference on Technological Advancements in Power and Energy, 2017, pp. 1–5. DOI: 10.1109/tapenergy.2017.8397239
Takashi I., Mochikawa H. A new control of PWM inverter for minimum loss operation of an induction motor drive. IEEE Transactions Industry Applications, 1985, vol. 21, no. 3, pp. 580–587. DOI: 10.1109/tia.1985.349713
Nho N.V., Youn M.J. Comprehensive study on space vector PWM and carrier based PWM correlation in multilevel invertors. Proc. Inst. Elect. Eng.–Elect. Power Appl., 2006, vol. 153, no. 1, pp. 149–158. DOI: 10.1049/ip-epa:20050046
IEEE Std 519-2014. IEEE Recommended practices and requirements for harmonic control in electri-cal power systems. American national standards institute. 2014. 29 p.
